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Alif Semiconductor /AE512F80F5582LS_CM55_HE_View /I3C /I3C_SCL_EXT_TERMN_LCNT_TIMING

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Interpret as I3C_SCL_EXT_TERMN_LCNT_TIMING

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0I3C_EXT_TERMN_LCNT

Description

SCL Termination Bit Low Count Timing Register

Fields

I3C_EXT_TERMN_LCNT

I3C Read Termination Bit Low Count. SDR0 speed: I3C_PP_LCNT + I3C_EXT_TERMN_LCNT SDR1 speed: I3C_EXT_LCNT_1 + I3C_EXT_TERMN_LCNT SDR2 speed: I3C_EXT_LCNT_2 + I3C_EXT_TERMN_LCNT SDR3 speed: I3C_EXT_LCNT_3 + I3C_EXT_TERMN_LCNT SDR4 speed: I3C_EXT_LCNT_4 + I3C_EXT_TERMN_LCNT

Links

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Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data